Sciweavers

3729 search results - page 126 / 746
» METRICS: a system architecture for design process optimizati...
Sort
View
ASAP
1996
IEEE
145views Hardware» more  ASAP 1996»
15 years 2 months ago
A Synthesis System For Bus-Based Wavefront Array Architectures
A datapath synthesis system (DPSS) for a bus-based wavefront array architecture, called rDPA (reconfigurable datapath architecture), is presented. An internal data bus to the arra...
Reiner W. Hartenstein, Jürgen Becker, Michael...
USENIX
2008
15 years 10 days ago
Optimizing TCP Receive Performance
The performance of receive side TCP processing has traditionally been dominated by the cost of the `per-byte' operations, such as data copying and checksumming. We show that ...
Aravind Menon, Willy Zwaenepoel
FPGA
2003
ACM
138views FPGA» more  FPGA 2003»
15 years 3 months ago
Automatic transistor and physical design of FPGA tiles from an architectural specification
One of the most difficult and time-consuming steps in the creation of an FPGA is its transistor-level design and physical layout. Modern commercial FPGAs typically consume anywher...
Ketan Padalia, Ryan Fung, Mark Bourgeault, Aaron E...
ICSR
2009
Springer
15 years 2 months ago
Consistency Checking for Component Reuse in Open Systems
Large scale Open Systems are built from reusable components in such a way that enhanced system functionality can be deployed, quickly and effectively, simply by plugging in a few n...
Peter Henderson, Matthew J. Henderson
ICASSP
2011
IEEE
14 years 1 months ago
Ordering for energy efficient estimation and optimization in sensor networks
A discretized version of a continuous optimization problem is considered for the case where data is obtained from a set of dispersed sensor nodes and the overall metric is a sum o...
Rick S. Blum