90 search results - page 10 / 18 » MLP-Aware Runahead Threads in a Simultaneous Multithreading ... |
IPPS
1998
IEEE
15 years 2 months ago
1998
IEEE
With aggressive superscalar processors delivering diminishing returns, alternate designs that make good use of the increasing chip densities are actively being explored. One such ...
MICRO
1997
IEEE
15 years 1 months ago
1997
IEEE
Compiler optimizations are often driven by specific assumptions about the underlying architecture and implementation of the target machine. For example, when targeting shared-mem...
HPCA
2005
IEEE
15 years 10 months ago
2005
IEEE
This paper introduces a novel technique which leverages value prediction and multithreading on a simultaneous multithreading processor to achieve higher performance in a single th...
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IPPS
2010
IEEE
14 years 7 months ago
2010
IEEE
Very Long Instruction Word (VLIW) processors are a popular choice in embedded domain due to their hardware simplicity, low cost and low power consumption. Simultaneous MultiThreadi...
DSD
2004
IEEE
15 years 1 months ago
2004
IEEE
In a Simultaneous Multithreaded (SMT) architecture, the front end of a superscalar is adapted in order to be able to fetch from several threads while the back end is shared among ...