90 search results - page 6 / 18 » MLP-Aware Runahead Threads in a Simultaneous Multithreading ... |
138
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ISCA
1992
IEEE
15 years 5 months ago
1992
IEEE
In this paper, we propose a multithreaded processor architecture which improves machine throughput. In our processor architecture, instructions from different threads (not a singl...
124
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ISCA
2002
IEEE
15 years 6 months ago
2002
IEEE
We propose a scheme for transient-fault recovery called Simultaneously and Redundantly Threaded processors with Recovery (SRTR) that enhances a previously proposed scheme for tran...
101
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IPPS
2006
IEEE
15 years 7 months ago
2006
IEEE
This paper explores thread scheduling on an increasingly popular architecture: chip multiprocessors with simultaneous multithreading cores. Conventional multiprocessor scheduling,...
101
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ICPP
2000
IEEE
15 years 5 months ago
2000
IEEE
This work considers the use of a n S M T (simultaneous multithreading) processor in lieu of the conventional processor(s) in a router and evaluates quantitatively the potential ga...
116
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CPHYSICS
2010
14 years 10 months ago
2010
We present TFORM, the version of the symbolic manipulation system FORM that can make simultaneous use of several processors in a shared memory architecture. The implementation use...