877 search results - page 25 / 176 » MXQuery with Hardware Acceleration |
111
Voted
PAIRING
2010
Springer
15 years 8 days ago
2010
Springer
This paper presents a novel method for designing compact yet efficient hardware implementations of the Tate pairing over supersingular curves in small characteristic. Since such cu...
196
Voted
WSCG
2003
15 years 3 months ago
2003
This paper summarizes several quality issues of an approach for high-quality filtering with arbitrary filter kernels on PC graphics hardware that has been presented previously. ...
113
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GLVLSI
2002
IEEE
15 years 6 months ago
2002
IEEE
This paper describes a new design for a hardware accelerator to support grid-based Maze Routing. Based on the direct mapped approach of Breuer and Shamsa [3], this work refines th...
95
Voted
CGO
2008
IEEE
15 years 8 months ago
2008
IEEE
In the embedded domain, custom hardware in the form of ASICs is often used to implement critical parts of applications when performance and energy efficiency goals cannot be met ...
123
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EURODAC
1994
IEEE
15 years 6 months ago
1994
IEEE
- The accelerator is destined to circuit-level simulation of digital and analog/digital MOS VLSI'c containing of up to 100 thousand transistors (with 16 Mb RAM host-machine). ...