877 search results - page 31 / 176 » MXQuery with Hardware Acceleration |
159
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ICCD
2006
IEEE
16 years 1 months ago
2006
IEEE
By integrating one or more (hard or soft) CPU core on the chip, new generation platform FPGAs have become configurable systems on a chip (CSoC) that support a combined software an...
172
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MICRO
2005
IEEE
15 years 10 months ago
2005
IEEE
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
130
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DATE
2009
IEEE
15 years 11 months ago
2009
IEEE
—FPGAs are widely used for evaluating the error-floor performance of LDPC (low-density parity check) codes. We propose a scalable vector decoder for FPGA-based implementation of...
128
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ICC
2007
IEEE
15 years 11 months ago
2007
IEEE
— This paper introduces a hardware architecture for high speed network processors, focusing on support for Quality of Service in IPSec-dedicated systems. The effort is aimed at d...
163
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ASAP
2000
IEEE
15 years 9 months ago
2000
IEEE
Permutation is widely used in cryptographic algorithms. However, it is not well-supported in existing instruction sets. In this paper, two instructions, PPERM3R and GRP, are propo...