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111
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HPCA
2006
IEEE
16 years 3 months ago
Exploiting parallelism and structure to accelerate the simulation of chip multi-processors
Simulation is an important means of evaluating new microarchitectures. Current trends toward chip multiprocessors (CMPs) try the ability of designers to develop efficient simulato...
David A. Penry, Daniel Fay, David Hodgdon, Ryan We...
EGH
2005
Springer
15 years 9 months ago
KD-tree acceleration structures for a GPU raytracer
Modern graphics hardware architectures excel at compute-intensive tasks such as ray-triangle intersection, making them attractive target platforms for raytracing. To date, most GP...
Tim Foley, Jeremy Sugerman
FPGA
2010
ACM
243views FPGA» more  FPGA 2010»
16 years 8 days ago
Bit-level optimization for high-level synthesis and FPGA-based acceleration
d hardware design from behavior-level abstraction has drawn wide interest in FPGA-based acceleration and configurable computing research field. However, for many high-level progra...
Jiyu Zhang, Zhiru Zhang, Sheng Zhou, Mingxing Tan,...
130
Voted
FPGA
2004
ACM
174views FPGA» more  FPGA 2004»
15 years 8 months ago
A compiled accelerator for biological cell signaling simulations
The simulation of large systems of biochemical reactions is a key part of research into molecular signaling and information processing in biological cells. However, it can be impr...
John F. Keane, Christopher Bradley, Carl Ebeling
FCCM
2007
IEEE
117views VLSI» more  FCCM 2007»
15 years 9 months ago
FPGA Acceleration of Gene Rearrangement Analysis
In this paper we present our work toward FPGA acceleration of phylogenetic reconstruction, a type of analysis that is commonly performed in the fields of systematic biology and co...
Jason D. Bakos