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IJCNN
2000
IEEE
15 years 6 months ago
Simulation of a Digital Neuro-Chip for Spiking Neural Networks
: Conventional hardware platforms are far from reaching real-time simulation requirements of complex spiking neural networks (SNN). Therefore we designed an accelerator board with ...
Tim Schönauer, S. Atasoy, N. Mehrtash, Heinri...
CASES
2009
ACM
15 years 8 months ago
CGRA express: accelerating execution using dynamic operation fusion
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
Yongjun Park, Hyunchul Park, Scott A. Mahlke
VVS
2000
IEEE
196views Visualization» more  VVS 2000»
15 years 6 months ago
Accelerating volume rendering with quantized voxels
We present here a new algorithm for accelerating volume rendering with an orthographic projection. Because volume rendering handles huge data sets, a reduction in the computationa...
Benjamin Mora, Jean-Pierre Jessel, René Cau...
IPPS
2010
IEEE
14 years 12 months ago
A GPU-inspired soft processor for high-throughput acceleration
There is building interest in using FPGAs as accelerators for high-performance computing, but existing systems for programming them are so far inadequate. In this paper we propose...
Jeffrey Kingyens, J. Gregory Steffan
HPCA
2008
IEEE
16 years 2 months ago
FlexiTaint: A programmable accelerator for dynamic taint propagation
This paper presents FlexiTaint, a hardware accelerator for dynamic taint propagation. FlexiTaint is implemented as an in-order addition to the back-end of the processor pipeline, ...
Guru Venkataramani, Ioannis Doudalis, Yan Solihin,...