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279
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FPGA
2011
ACM
401views FPGA» more  FPGA 2011»
14 years 6 months ago
LegUp: high-level synthesis for FPGA-based processor/accelerator systems
In this paper, we introduce a new open source high-level synthesis tool called LegUp that allows software techniques to be used for hardware design. LegUp accepts a standard C pro...
Andrew Canis, Jongsok Choi, Mark Aldham, Victor Zh...
115
Voted
ASPLOS
2010
ACM
15 years 10 months ago
ParaLog: enabling and accelerating online parallel monitoring of multithreaded applications
Instruction-grain lifeguards monitor the events of a running application at the level of individual instructions in order to identify and help mitigate application bugs and securi...
Evangelos Vlachos, Michelle L. Goodstein, Michael ...
132
Voted
IOLTS
2007
IEEE
120views Hardware» more  IOLTS 2007»
15 years 9 months ago
Accelerating Soft Error Rate Testing Through Pattern Selection
Soft error due to ionizing radiation is emerging as a major concern for future technologies. The measurement unit for failures due to soft errors is called Failure-In-Time (FIT) t...
Alodeep Sanyal, Kunal P. Ganeshpure, Sandip Kundu
146
Voted
LCTRTS
2009
Springer
15 years 10 months ago
Synergistic execution of stream programs on multicores with accelerators
The StreamIt programming model has been proposed to exploit parallelism in streaming applications on general purpose multicore architectures. The StreamIt graphs describe task, da...
Abhishek Udupa, R. Govindarajan, Matthew J. Thazhu...
CAV
2007
Springer
108views Hardware» more  CAV 2007»
15 years 9 months ago
Systematic Acceleration in Regular Model Checking
Abstract. Regular model checking is a form of symbolic model checking technique for systems whose states can be represented as finite words over a finite alphabet, where regular ...
Bengt Jonsson, Mayank Saksena