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» Machine scheduling with resource dependent processing times
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ICS
1998
Tsinghua U.
15 years 8 months ago
Load Execution Latency Reduction
In order to achieve high performance, contemporary microprocessors must effectively process the four major instruction types: ALU, branch, load, and store instructions. This paper...
Bryan Black, Brian Mueller, Stephanie Postal, Ryan...
ASPDAC
2005
ACM
146views Hardware» more  ASPDAC 2005»
15 years 5 months ago
High-level synthesis for DSP applications using heterogeneous functional units
Abstract— This paper addresses high level synthesis for realtime digital signal processing (DSP) architectures using heterogeneous functional units (FUs). For such special purpos...
Zili Shao, Qingfeng Zhuge, Chun Xue, Bin Xiao, Edw...
133
Voted
LREC
2008
114views Education» more  LREC 2008»
15 years 5 months ago
Improving Statistical Machine Translation Efficiency by Triangulation
In current phrase-based Statistical Machine Translation systems, more training data is generally better than less. However, a larger data set eventually introduces a larger model ...
Yu Chen, Andreas Eisele, Martin Kay
SIMPRA
2008
94views more  SIMPRA 2008»
15 years 3 months ago
A simulation based experimental design to analyze factors affecting production flow time
In this paper we analyze and evaluate the effects of some pre-defined process parameters on the performance of a manufacturing system. These parameters include two different plant...
Banu Y. Ekren, Arslan M. Ornek
130
Voted
CODES
2007
IEEE
15 years 10 months ago
Scheduling and voltage scaling for energy/reliability trade-offs in fault-tolerant time-triggered embedded systems
In this paper we present an approach to the scheduling and voltage scaling of low-power fault-tolerant hard real-time applications mapped on distributed heterogeneous embedded sys...
Paul Pop, Kåre Harbo Poulsen, Viacheslav Izo...