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IJCNN
2000
IEEE
15 years 2 months ago
Analog Hardware Implementation of the Random Neural Network Model
This paper presents a simple continuous analog hardware realization of the Random Neural Network (RNN) model. The proposed circuit uses the general principles resulting from the u...
Hossam Abdelbaki, Erol Gelenbe, Said E. El-Khamy
ASPDAC
2007
ACM
79views Hardware» more  ASPDAC 2007»
15 years 1 months ago
Challenges to Accuracy for the Design of Deep-Submicron RF-CMOS Circuits
- Two challenges for the accurate prediction of GHz CMOS analog/RF building blocks are presented. Challenging the usage of new compact MOSFET models enhances the simulation accurac...
S. Yoshitomi
ISCAS
2006
IEEE
144views Hardware» more  ISCAS 2006»
15 years 3 months ago
A VLSI spike-driven dynamic synapse which learns only when necessary
— We describe an analog VLSI circuit implementing spike-driven synaptic plasticity, embedded in a network of integrate-and-fire neurons. This biologically inspired synapse is hi...
S. Mitra, Stefano Fusi, Giacomo Indiveri
GLVLSI
2003
IEEE
194views VLSI» more  GLVLSI 2003»
15 years 3 months ago
RF CMOS circuit optimizing procedure and synthesis tool
In this paper, we discuss a methodology to design and synthesize analog CMOS components such as RF amplifiers. The inputs of the synthesis tool are the circuit specifications desc...
Chandrasekar Rajagopal, Karthik Sridhar, Adrian Nu...
AHS
2006
IEEE
95views Hardware» more  AHS 2006»
15 years 1 months ago
A Modular Framework for the Evolution of Circuits on Configurable Transistor Array Architectures
This paper gives an overview over the progress that has been made by the Heidelberg FPTA group within the field of analog evolvable hardware. Achievements are the design of a CMOS...
Martin Trefzer, Jörg Langeheine, Karlheinz Me...