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RTSS
1997
IEEE
15 years 1 months ago
Exploiting skips in periodic tasks for enhancing aperiodic responsiveness
In certain real-time applications, ranging from multimedia to telecommunication systems, timing constraints can be more flexible than scheduling theory usually permits. For exampl...
Marco Caccamo, Giorgio C. Buttazzo
ICCAD
2009
IEEE
179views Hardware» more  ICCAD 2009»
14 years 7 months ago
Automatic memory partitioning and scheduling for throughput and power optimization
Hardware acceleration is crucial in modern embedded system design to meet the explosive demands on performance and cost. Selected computation kernels for acceleration are usually ...
Jason Cong, Wei Jiang, Bin Liu, Yi Zou
ISQED
2003
IEEE
85views Hardware» more  ISQED 2003»
15 years 3 months ago
Static Pin Mapping and SOC Test Scheduling for Cores with Multiple Test Sets
An algorithm for mapping core terminals to System-On-a-Chip (SOC) I/O pins and scheduling tests in order to achieve costefficient concurrent test for core-based designs is present...
Yu Huang, Wu-Tung Cheng, Chien-Chung Tsai, Nilanja...
PLDI
2006
ACM
15 years 3 months ago
Automatic instruction scheduler retargeting by reverse-engineering
In order to generate high-quality code for modern processors, a compiler must aggressively schedule instructions, maximizing resource utilization for execution efficiency. For a ...
Matthew J. Bridges, Neil Vachharajani, Guilherme O...
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ISCAS
2003
IEEE
119views Hardware» more  ISCAS 2003»
15 years 3 months ago
Simulated evolution algorithm for multiobjective VLSI netlist bi-partitioning
In this paper, the Simulated Evolution algorithm (SimE) is engineered to solve the optimization problem of multi-objective VLSI netlist bi-partitioning. The multi-objective versio...
Sadiq M. Sait, Aiman H. El-Maleh, Rush H. Al-Abuji