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HIPEAC
2010
Springer
15 years 9 months ago
Scalable Shared-Cache Management by Containing Thrashing Workloads
Abstract. Multi-core processors with shared last-level caches are vulnerable to performance inefficiencies and fairness issues when the cache is not carefully managed between the m...
Yuejian Xie, Gabriel H. Loh
ICDE
2007
IEEE
131views Database» more  ICDE 2007»
15 years 6 months ago
Enhancing Secured Service Interoperability with Decentralized Orchestration
Several current research efforts in business process modeling are investigating XML-based executable formal specification languages. The availability of the latter allows modeled...
Ustun Yildiz, Claude Godart
IEEEPACT
2007
IEEE
15 years 6 months ago
Verification-Aware Microprocessor Design
The process of verifying a new microprocessor is a major problem for the computer industry. Currently, architects design processors to be fast, power-efficient, and reliable. Howe...
Anita Lungu, Daniel J. Sorin
LPNMR
2007
Springer
15 years 6 months ago
The First Answer Set Programming System Competition
This paper gives a summary of the First Answer Set Programming System Competition that was held in conjunction with the Ninth International Conference on Logic Programming and Nonm...
Martin Gebser, Lengning Liu, Gayathri Namasivayam,...
GLVLSI
2006
IEEE
95views VLSI» more  GLVLSI 2006»
15 years 5 months ago
Test generation using SAT-based bounded model checking for validation of pipelined processors
Functional verification is one of the major bottlenecks in microprocessor design. Simulation-based techniques are the most widely used form of processor verification. Efficient ...
Heon-Mo Koo, Prabhat Mishra