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2005
ACM
15 years 5 months ago
Fault Tolerance Techniques for the Merrimac Streaming Supercomputer
As device scales shrink, higher transistor counts are available while soft-errors, even in logic, become a major concern. A new class of architectures, such as Merrimac and the IB...
Mattan Erez, Nuwan Jayasena, Timothy J. Knight, Wi...
CODES
2006
IEEE
15 years 5 months ago
Increasing the throughput of an adaptive router in network-on-chip (NoC)
In this paper, we propose a simple and efficient mechanism to increase the throughput of an adaptive router in Networkon-Chip (NoC). One of the most serious disadvantages of fully...
Seung Eun Lee, Nader Bagherzadeh
FCCM
2002
IEEE
146views VLSI» more  FCCM 2002»
15 years 4 months ago
Fast Area Estimation to Support Compiler Optimizations in FPGA-Based Reconfigurable Systems
Several projects have developed compiler tools that translate high-level languages down to hardware description languages for mapping onto FPGAbased reconfigurable computers. Thes...
Dhananjay Kulkarni, Walid A. Najjar, Robert Rinker...
ASPDAC
2007
ACM
140views Hardware» more  ASPDAC 2007»
15 years 3 months ago
An Architecture for Combined Test Data Compression and Abort-on-Fail Test
1 The low throughput at IC (Integrated Circuit) testing is mainly due to the increasing test data volume, which leads to high ATE (Automatic Test Equipment) memory requirements and...
Erik Larsson, Jon Persson
FPL
2005
Springer
98views Hardware» more  FPL 2005»
15 years 5 months ago
A Verilog RTL Synthesis Tool for Heterogeneous FPGAs
Modern heterogeneous FPGAs contain “hard” specificpurpose structures such as blocks of memory and multipliers in addition to the completely flexible “soft” programmable ...
Peter Jamieson, Jonathan Rose