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CEC
2003
IEEE
15 years 9 months ago
An evolutionary approach for reducing the switching activity in address buses
In this paper we present two new approaches based on genetic algorithms (GA) to reduce power consumption by communication buses in an embedded system. The first approach makes it ...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi,...
DATE
2003
IEEE
127views Hardware» more  DATE 2003»
15 years 9 months ago
Exploring High Bandwidth Pipelined Cache Architecture for Scaled Technology
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
Amit Agarwal, Kaushik Roy, T. N. Vijaykumar
127
Voted
EDOC
2003
IEEE
15 years 9 months ago
An Agent-based Architecture for Analyzing Business Processes of Real-Time Enterprises
As the desire for business intelligence capabilities for e-business processes expands, existing workflow management systems and decision support systems are not able to provide co...
Jun-Jang Jeng, Josef Schiefer, Henry Chang
129
Voted
ICALT
2003
IEEE
15 years 9 months ago
Gaining Computational Literacy by Creating Hybrid Aesthetic Learning Spaces
Although the technical skills of pupils are quite high, the current approach to gain media literacy still focusses on updating software applying skills, rather than exploring the ...
Daniela Reimann, Michael Herczeg, Thomas Winkler, ...
RTAS
2003
IEEE
15 years 9 months ago
Probabilistic Worst-Case Response-Time Analysis for the Controller Area Network
This paper presents a novel approach for calculating a probabilistic worst-case response-time for messages in the Controller Area Network (CAN). CAN uses a bit-stuffing mechanism...
Thomas Nolte, Hans Hansson, Christer Norström