Sciweavers

6607 search results - page 392 / 1322
» Making TeX Work
Sort
View
HIPEAC
2010
Springer
16 years 2 months ago
Combining Locality Analysis with Online Proactive Job Co-scheduling in Chip Multiprocessors
Abstract. The shared-cache contention on Chip Multiprocessors causes performance degradation to applications and hurts system fairness. Many previously proposed solutions schedule ...
Yunlian Jiang, Kai Tian, Xipeng Shen
ICCAD
2008
IEEE
147views Hardware» more  ICCAD 2008»
16 years 1 months ago
Overlay aware interconnect and timing variation modeling for double patterning technology
— As Double Patterning Technology (DPT) becomes the only solution for 32-nm lithography process, we need to investigate how DPT affects the performance of a chip. In this paper, ...
Jae-Seok Yang, David Z. Pan
ICCAD
2005
IEEE
120views Hardware» more  ICCAD 2005»
16 years 1 months ago
Practical techniques to reduce skew and its variations in buffered clock networks
Clock skew is becoming increasingly difficult to control due to variations. Link based non-tree clock distribution is a cost-effective technique for reducing clock skew variation...
Ganesh Venkataraman, Nikhil Jayakumar, Jiang Hu, P...
ICCAD
2005
IEEE
97views Hardware» more  ICCAD 2005»
16 years 1 months ago
DiCER: distributed and cost-effective redundancy for variation tolerance
— Increasingly prominent variational effects impose imminent threat to the progress of VLSI technology. This work explores redundancy, which is a well-known fault tolerance techn...
Di Wu, Ganesh Venkataraman, Jiang Hu, Quiyang Li, ...
CHI
2010
ACM
15 years 12 months ago
Designing with interactive example galleries
Designers often use examples for inspiration; examples offer contextualized instances of how form and content integrate. Can interactive example galleries bring this practice to e...
Brian Lee, Savil Srivastava, Ranjitha Kumar, Ronen...