Sciweavers

8695 search results - page 1626 / 1739
» Making the Complex Simple
Sort
View
ISCA
2009
IEEE
137views Hardware» more  ISCA 2009»
15 years 9 months ago
A case for an interleaving constrained shared-memory multi-processor
Shared-memory multi-threaded programming is inherently more difficult than single-threaded programming. The main source of complexity is that, the threads of an application can in...
Jie Yu, Satish Narayanasamy
ISCA
2009
IEEE
161views Hardware» more  ISCA 2009»
15 years 9 months ago
AnySP: anytime anywhere anyway signal processing
In the past decade, the proliferation of mobile devices has increased at a spectacular rate. There are now more than 3.3 billion active cell phones in the world—a device that we...
Mark Woh, Sangwon Seo, Scott A. Mahlke, Trevor N. ...
ISCA
2009
IEEE
136views Hardware» more  ISCA 2009»
15 years 9 months ago
Architectural core salvaging in a multi-core processor for hard-error tolerance
The incidence of hard errors in CPUs is a challenge for future multicore designs due to increasing total core area. Even if the location and nature of hard errors are known a prio...
Michael D. Powell, Arijit Biswas, Shantanu Gupta, ...
MICRO
2009
IEEE
132views Hardware» more  MICRO 2009»
15 years 9 months ago
EazyHTM: eager-lazy hardware transactional memory
Transactional Memory aims to provide a programming model that makes parallel programming easier. Hardware implementations of transactional memory (HTM) suffer from fewer overhead...
Sasa Tomic, Cristian Perfumo, Chinmay Eishan Kulka...
APNOMS
2009
Springer
15 years 9 months ago
A Scheme for Supporting Optimal Path in 6LoWPAN Based MANEMO Networks
In this paper, we focus on the scheme for the route optimization in 6LoWPAN based MANEMO environments. If 6LoWPAN mobile routers for supporting NEMO protocol are organized by neste...
Jin Ho Kim, Choong Seon Hong
« Prev « First page 1626 / 1739 Last » Next »