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MICRO
2007
IEEE
144views Hardware» more  MICRO 2007»
15 years 4 months ago
Process Variation Tolerant 3T1D-Based Cache Architectures
Process variations will greatly impact the stability, leakage power consumption, and performance of future microprocessors. These variations are especially detrimental to 6T SRAM ...
Xiaoyao Liang, Ramon Canal, Gu-Yeon Wei, David Bro...
SIGMETRICS
1998
ACM
187views Hardware» more  SIGMETRICS 1998»
15 years 1 months ago
An Analytic Behavior Model for Disk Drives with Readahead Caches and Request Reordering
Modern disk drives read-ahead data and reorder incoming requests in a workload-dependent fashion. This improves their performance, but makes simple analytical models of them inade...
Elizabeth A. M. Shriver, Arif Merchant, John Wilke...
89
Voted
CASES
2010
ACM
14 years 7 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
IADIS
2003
14 years 11 months ago
Scalability of Cooperative Algorithms for Distributed Architectures of Proxy Servers
Systems consisting of multiple proxy servers are a popular solution to deal with performance and network resource utilization problems related to the growth of the Web numbers. Af...
Riccardo Lancellotti, Francesca Mazzoni, Michele C...
82
Voted
ICN
2005
Springer
15 years 3 months ago
Scalable Group Key Management with Partially Trusted Controllers
Abstract. Scalable group key management solutions are crucial for supporting Internet applications that are based on a group communication model. Many solutions have been proposed ...
Himanshu Khurana, Rafael Bonilla, Adam J. Slagell,...