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DAC
2007
ACM
15 years 11 months ago
Variation Resilient Low-Power Circuit Design Methodology using On-Chip Phase Locked Loop
This paper presents a variation resilient circuit design technique for maintaining parametric yield of design under inherent variation in process parameters. We propose to utilize...
Kunhyuk Kang, Kee-Jong Kim, Kaushik Roy
TJS
2002
121views more  TJS 2002»
14 years 10 months ago
Precise Data Locality Optimization of Nested Loops
A significant source for enhancing application performance and for reducing power consumption in embedded processor applications is to improve the usage of the memory hierarchy. In...
Vincent Loechner, Benoît Meister, Philippe C...
TNN
2008
124views more  TNN 2008»
14 years 10 months ago
Just-in-Time Adaptive Classifiers - Part II: Designing the Classifier
Aging effects, environmental changes, thermal drifts, and soft and hard faults affect physical systems by changing their nature and behavior over time. To cope with a process evolu...
Cesare Alippi, Manuel Roveri
KIVS
2001
Springer
15 years 2 months ago
Real-Time Support on Top of Ethernet
Ethernet is a widely used low-cost networking technology. It however lacks the determinism and resource management features needed to meet realtime requirements of multimedia appli...
Rainer Koster, Thorsten Kramp
EUC
2008
Springer
15 years 6 days ago
Privacy Engine for Context-Aware Enterprise Application Services
Satisfying the varied privacy preferences of individuals, while exposing context data to authorized applications and individuals, remains a major challenge for context-aware compu...
Marion Blount, John Davis, Maria Ebling, William F...