In this paper, we propose a new approach for VLSI interconnect global routing that can optimize both congestion and delay, which are often competing objectives. Our approach provi...
In this paper, we propose a new model order reduction approach for large interconnect circuits using hierarchical decomposition and Krylov subspace projection-based model order re...
Model checking is a powerful and widespread technique for the verification of finite distributed systems. However, the main hindrance for wider application of this technique is the...
This paper describes a way to manage the modeling and analysis of Scheduled Maintenance Systems (SMS) within an analytically tractable context. We chose a significant case study h...
This paper presents a statistical framework to cooperatively design and develop technology, product circuit, benchmarking and model early in the development stage. The statistical...
Choongyeun Cho, Daeik D. Kim, Jonghae Kim, Jean-Ol...