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143
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IPPS
2003
IEEE
15 years 7 months ago
Architectural Frameworks for MPP Systems on a Chip
Advances in fabrication techniques are now enabling new hybrid CPU/FPGA computing resources to be integrated onto a single chip. While these new hybrids promise significant perfor...
David L. Andrews, Douglas Niehaus
114
Voted
PDCAT
2005
Springer
15 years 7 months ago
An Agile Programming Model for Grid End Users
Grid and service computing technologies have been explored by enterprises to promote integration, sharing, and collaboration. However, quick response to business environment chang...
Zhiwei Xu, Chengchun Shu, Haiyan Yu, Haozhi Liu
101
Voted
JMLR
2006
80views more  JMLR 2006»
15 years 1 months ago
Using Machine Learning to Guide Architecture Simulation
An essential step in designing a new computer architecture is the careful examination of different design options. It is critical that computer architects have efficient means by ...
Greg Hamerly, Erez Perelman, Jeremy Lau, Brad Cald...
IPPS
2010
IEEE
14 years 11 months ago
A PRAM-NUMA model of computation for addressing low-TLP workloads
It is possible to implement the parallel random access machine (PRAM) on a chip multiprocessor (CMP) efficiently with an emulated shared memory (ESM) architecture to gain easy par...
Martti Forsell
115
Voted
JMLR
2006
108views more  JMLR 2006»
15 years 1 months ago
The Interplay of Optimization and Machine Learning Research
The fields of machine learning and mathematical programming are increasingly intertwined. Optimization problems lie at the heart of most machine learning approaches. The Special T...
Kristin P. Bennett, Emilio Parrado-Hernánde...