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ASPDAC
2007
ACM
122views Hardware» more  ASPDAC 2007»
15 years 1 months ago
A Novel Reconfigurable Low Power Distributed Arithmetic Architecture for Multimedia Applications
- The use of reconfigurable cores in system on chip (SoC) designs is increasingly becoming a trend. Such cores are being used for their flexibility, powerful functionality and low ...
Zhenyu Liu, Tughrul Arslan, Ahmet T. Erdogan
PDCAT
2005
Springer
15 years 3 months ago
Optimal Routing in a Small-World Network
Recently a bulk of research [14, 5, 15, 9] has been done on the modelling of the smallworld phenomenon, which has been shown to be pervasive in social and nature networks, and eng...
Jianyang Zeng, Wen-Jing Hsu
PPL
2008
185views more  PPL 2008»
14 years 9 months ago
On Design and Application Mapping of a Network-on-Chip(NoC) Architecture
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...
Jun Ho Bahn, Seung Eun Lee, Yoon Seok Yang, Jungso...
ICS
2004
Tsinghua U.
15 years 3 months ago
Adaptive incremental checkpointing for massively parallel systems
Given the scale of massively parallel systems, occurrence of faults is no longer an exception but a regular event. Periodic checkpointing is becoming increasingly important in the...
Saurabh Agarwal, Rahul Garg, Meeta Sharma Gupta, J...
SAC
2010
ACM
15 years 4 months ago
Asynchronous Byzantine consensus with 2f+1 processes
Byzantine consensus in asynchronous message-passing systems has been shown to require at least 3f + 1 processes to be solvable in several system models (e.g., with failure detecto...
Miguel Correia, Giuliana Santos Veronese, Lau Cheu...