56 search results - page 1 / 12 » Mapping the FDTD Application to Many-Core Chip Architectures |
73
Voted
ICPP
2009
IEEE
15 years 5 months ago
2009
IEEE
—This paper reports a study of mapping the Finite Difference Time Domain (FDTD) application to the IBM Cyclops64 (C64) many-core chip architecture [1]. C64 is chosen for this stu...
EUROPAR
2010
Springer
14 years 11 months ago
2010
Springer
Abstract. Performance of the on-chip cache is critical for processor. The multithread program model usually employed by on-chip many-core architectures may have effects on cache ac...
118
Voted
EUROPAR
2010
Springer
14 years 11 months ago
2010
Springer
Abstract. Traditional parallel programming methodologies for improving performance assume cache-based parallel systems. However, new architectures, like the IBM Cyclops-64 (C64), b...
98
Voted
ICCD
2008
IEEE
15 years 7 months ago
2008
IEEE
- In this paper, we analyze the impact of network contention on the application mapping for tile-based Networkon-Chip (NoC) architectures. Our main theoretical contribution consist...
111
click to vote
PPL
2008
14 years 10 months ago
2008
As the number of integrated IP cores in the current System-on-Chips (SoCs) keeps increasing, communication requirements among cores can not be sufficiently satisfied using either ...