Sciweavers

2366 search results - page 270 / 474
» Mapping time
Sort
View
ISSS
1998
IEEE
130views Hardware» more  ISSS 1998»
15 years 8 months ago
Communication and Interface Synthesis on a Rapid Prototyping Hardware/Software Codesign System
In this paper, we propose the target board architecture of a rapid prototyping embedded system based on hardware software codesign. The target board contains a TMS320C30 DSP proce...
Yin-Tsung Hwang, Yuan-Hung Wang
ICCAD
1997
IEEE
127views Hardware» more  ICCAD 1997»
15 years 8 months ago
OPTIMIST: state minimization for optimal 2-level logic implementation
We present a novel method for state minimization of incompletely-specified finite state machines. Where classic methods simply minimize the number of states, ours directly addre...
Robert M. Fuhrer, Steven M. Nowick
INFOCOM
1997
IEEE
15 years 8 months ago
Addressing Network Survivability Issues by Finding the K-Best Paths through a Trellis Graph
Due to the increasing reliance of our society on the timely and reliable transfer of large quantities of information (suchas voice, data, and video)across high speed communication...
Stavros D. Nikolopoulos, Andreas Pitsillides, Davi...
FPL
1997
Springer
68views Hardware» more  FPL 1997»
15 years 7 months ago
Pipeline morphing and virtual pipelines
Abstract. Pipeline morphing is a simple but e ective technique for recon guring pipelined FPGA designs at run time. By overlapping computation and recon guration, the latency assoc...
Wayne Luk, Nabeel Shirazi, Shaori Guo, Peter Y. K....
121
Voted
ICRA
1994
IEEE
99views Robotics» more  ICRA 1994»
15 years 7 months ago
An Optimal Sonar Array for Target Localization and Classification
A novel sonar array for mobile robots is presented with applications to localization and mapping of indoor environments. The ultrasonic sensor localizes and classifies multiple ta...
Lindsay Kleeman, Roman Kuc