30 search results - page 2 / 6 » Mapping to Reduce Contention in Multiprocessor Architectures |
DAC
2008
ACM
14 years 11 months ago
2008
ACM
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
ASPDAC
2010
ACM
14 years 7 months ago
2010
ACM
- In this paper, we propose a novel and global A3MAP (Architecture-Aware Analytic Mapping) algorithm applied to NoC (Networks-on-Chip) based MPSoC (Multi-Processor System-on-Chip) ...
ICCD
2008
IEEE
15 years 6 months ago
2008
IEEE
- In this paper, we analyze the impact of network contention on the application mapping for tile-based Networkon-Chip (NoC) architectures. Our main theoretical contribution consist...
IEEEPACT
2003
IEEE
15 years 2 months ago
2003
IEEE
We investigate the implementation of IP look-up for core routers using multiple microengines and a tailored memory hierarchy. The main architectural concerns are limiting the numb...
IPPS
1999
IEEE
15 years 1 months ago
1999
IEEE
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...