2278 search results - page 383 / 456 » Markov logic networks |
FPL
2009
Springer
15 years 4 months ago
2009
Springer
Clock gating is a power reduction technique that has been used successfully in the custom ASIC domain. Clock and logic signal power are saved by temporarily disabling the clock si...
ISPD
1999
ACM
15 years 4 months ago
1999
ACM
This paper presents a methodology to analyze signal integrity such as power voltage drop and clock skew in early stages of design, more specifically, when RTL-design and early flo...
SSDBM
1998
IEEE
15 years 4 months ago
1998
IEEE
In this demonstration, we show three interrelated tools intended to improve different aspects of the quality of data warehouse solutions. Firstly, the deductive object manager Con...
100
click to vote
FPL
1997
Springer
15 years 4 months ago
1997
Springer
Technology mapping can be viewed as the optimization problem of finding a minimum cost cover of the given Boolean network by choosing from given library of logic cells. The core of...
HICSS
1994
IEEE
15 years 4 months ago
1994
IEEE
In the area of telerobotics, where remote systems are to be controlled, it is helpful to plan subsequent operations based on as much relevant data as possible. The simulation of t...