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» Massively parallel processing on a chip
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ISCAPDCS
2007
15 years 5 months ago
Architectural requirements of parallel computational biology applications with explicit instruction level parallelism
—The tremendous growth in the information culture, efficient digital searches are needed to extract and identify information from huge data. The notion that evolution in silicon ...
Naeem Zafar Azeemi
LCPC
2000
Springer
15 years 7 months ago
Automatic Coarse Grain Task Parallel Processing on SMP Using OpenMP
This paper proposes a simple and efficient implementation method for a hierarchical coarse grain task parallel processing scheme on a SMP machine. OSCAR multigrain parallelizing c...
Hironori Kasahara, Motoki Obata, Kazuhisa Ishizaka
IPPS
2003
IEEE
15 years 9 months ago
Expresso and Chips: Creating a Next Generation Microarray Experiment Management System
Expresso is an experiment management system that is designed to assist biologists in planning, executing, and interpreting microarray experiments. It serves as a unifying framewor...
Allan A. Sioson, Jonathan I. Watkinson, Cecilia Va...
147
Voted
IPPS
1997
IEEE
15 years 8 months ago
A Tool for On-line Visualization and Interactive Steering of Parallel HPC Applications
Tools for parallel systems today range from specification over debugging to performance analysis and more. Typically, they help the programmers of parallel algorithms from the ea...
Sabine Rathmayer
124
Voted
ISPAN
2009
IEEE
15 years 10 months ago
Vector Bank Based Multimedia Codec System-on-a-Chip (SoC) Design
—In this paper, we present a design architecture of implementing a ”Vector Bank” into video encoder system, namely, an H.264 encoder, in order to detect and analyze the movin...
Ruei-Xi Chen, Wei Zhao, Jeffrey Fan, Asad Davari