391 search results - page 66 / 79 » Massively parallel processing on a chip |
116
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RSP
2006
IEEE
15 years 5 months ago
2006
IEEE
Embedded real-time multimedia applications usually imply data parallel processing. SIMD processors embedded in SOCs are cost-effective to exploit the underlying parallelism. Howev...
SAC
2006
ACM
15 years 5 months ago
2006
ACM
The reduction of image reconstruction time is needed to spread the use of PET for research and routine clinical practice. In this purpose, this article presents a hardware/softwar...
IEEEPACT
2005
IEEE
15 years 5 months ago
2005
IEEE
In this paper we compare the performance of area equivalent small, medium, and large-scale multithreaded chip multiprocessors (CMTs) using throughput-oriented applications. We use...
97
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IPPS
2003
IEEE
15 years 5 months ago
2003
IEEE
Tiled architectures can provide a model for early estimation of global interconnect costs. A design exploration tool for reconfigurable architectures is currently under developmen...
114
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ISSS
1999
IEEE
15 years 4 months ago
1999
IEEE
This paper describes a mechanism for automatic design and synthesis of very long instruction word (VLIW), and its generalization, explicitly parallel instruction computing rocesso...