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ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 9 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
SIGMETRICS
2003
ACM
147views Hardware» more  SIGMETRICS 2003»
15 years 9 months ago
Effect of node size on the performance of cache-conscious B+-trees
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
Richard A. Hankins, Jignesh M. Patel
APSEC
2002
IEEE
15 years 9 months ago
A Predictive Performance Model to Evaluate the Contention Cost in Application Servers
In multi-tier enterprise systems, application servers are key components to implement business logic and provide services. To support a large number of simultaneous accesses from ...
Shiping Chen, Ian Gorton
HICSS
2002
IEEE
91views Biometrics» more  HICSS 2002»
15 years 9 months ago
Neuroimaging Studies Give New Insight to Mental Rotation
This paper summarizes the recent findings of mental rotation studies which use neuroimaging techniques. Though many results differed, almost all the reviewed studies concurred tha...
Wendy S. Ark
ISSS
2002
IEEE
124views Hardware» more  ISSS 2002»
15 years 9 months ago
A New Performance Evaluation Approach for System Level Design Space Exploration
Application specific systems have potential for customization of design with a view to achieve a better costperformance-power trade-off. Such customization requires extensive de...
M. Balakrishnan, Anshul Kumar, C. P. Joshi