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» Measuring Multicore Performance
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PDP
2011
IEEE
14 years 1 months ago
Quantifying Thread Vulnerability for Multicore Architectures
Abstract—Continuously reducing transistor sizes and aggressive low power operating modes employed by modern architectures tend to increase transient error rates. Concurrently, mu...
Isil Oz, Haluk Rahmi Topcuoglu, Mahmut T. Kandemir...
SIGMOD
2009
ACM
161views Database» more  SIGMOD 2009»
15 years 4 months ago
Dependency-aware reordering for parallelizing query optimization in multi-core CPUs
The state of the art commercial query optimizers employ cost-based optimization and exploit dynamic programming (DP) to find the optimal query execution plan (QEP) without evalua...
Wook-Shin Han, Jinsoo Lee
MICRO
2006
IEEE
84views Hardware» more  MICRO 2006»
15 years 3 months ago
Reunion: Complexity-Effective Multicore Redundancy
To protect processor logic from soft errors, multicore redundant architectures execute two copies of a program on separate cores of a chip multiprocessor (CMP). Maintaining identi...
Jared C. Smolens, Brian T. Gold, Babak Falsafi, Ja...
CODES
2010
IEEE
14 years 7 months ago
A task remapping technique for reliable multi-core embedded systems
With the continuous scaling of semiconductor technology, the life-time of circuit is decreasing so that processor failure becomes an important issue in MPSoC design. A software so...
Chanhee Lee, Hokeun Kim, Hae-woo Park, Sungchan Ki...
ANCS
2009
ACM
14 years 7 months ago
Design of a scalable nanophotonic interconnect for future multicores
As communication-centric computing paradigm gathers momentum due to increased wire delays and excess power dissipation with technology scaling, researchers have focused their atte...
Avinash Karanth Kodi, Randy Morris