402 search results - page 16 / 81 » Measuring Operating System Overhead on CMT Processors |
ISCA
1997
IEEE
15 years 1 months ago
1997
IEEE
In this paper we evaluate the performance of high bandwidth caches that employ multiple ports, multiple cycle hit times, on-chip DRAM, and a line buffer to find the organization t...
ASPLOS
2004
ACM
15 years 2 months ago
2004
ACM
We present a novel processor architecture designed specifically for use in low-power wireless sensor-network nodes. Our sensor network asynchronous processor (SNAP/LE) is based on...
JCP
2008
14 years 9 months ago
2008
Implantable pacemaker is a battery operated real time embedded system, which includes software/hardware codesign strategy. As it is placed within the heart by surgery, battery life...
FPL
2007
Springer
15 years 3 months ago
2007
Springer
We introduce a new execution model for orchestrating the interaction between the conventional processor and the reconfigurable compute unit in adaptive computer systems. We then ...
USS
2010
14 years 7 months ago
2010
In recent years, many advances have been made in cryptography, as well as in the performance of communication networks and processors. As a result, many advanced cryptographic pro...