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» Measuring Operating System Overhead on CMT Processors
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SIGMETRICS
2003
ACM
147views Hardware» more  SIGMETRICS 2003»
15 years 6 months ago
Effect of node size on the performance of cache-conscious B+-trees
In main-memory databases, the number of processor cache misses has a critical impact on the performance of the system. Cacheconscious indices are designed to improve performance b...
Richard A. Hankins, Jignesh M. Patel
SC
1995
ACM
15 years 4 months ago
Predicting Application Behavior in Large Scale Shared-memory Multiprocessors
In this paper we present an analytical-based framework for parallel program performance prediction. The main thrust of this work is to provide a means for treating realistic appli...
Karim Harzallah, Kenneth C. Sevcik
EMSOFT
2007
Springer
15 years 5 months ago
A unified practical approach to stochastic DVS scheduling
This paper deals with energy-aware real-time system scheduling using dynamic voltage scaling (DVS) for energy-constrained embedded systems that execute variable and unpredictable ...
Ruibin Xu, Rami G. Melhem, Daniel Mossé
MICRO
2008
IEEE
111views Hardware» more  MICRO 2008»
15 years 7 months ago
Reducing the harmful effects of last-level cache polluters with an OS-level, software-only pollute buffer
It is well recognized that LRU cache-line replacement can be ineffective for applications with large working sets or non-localized memory access patterns. Specifically, in lastle...
Livio Soares, David K. Tam, Michael Stumm
TCOM
2010
130views more  TCOM 2010»
14 years 11 months ago
On modeling, analysis, and optimization of packet aggregation systems
Abstract—In packet communication systems, a header is attached to the transmitted packet at each layer. The overhead due to the transmission of the individual header can have a s...
Jung Ha Hong, Khosrow Sohraby