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» Measuring the Architecture Design Process
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MOBILITY
2009
ACM
15 years 9 months ago
Context adaptative systems based on horizontal architecture for ubiquitous computing
Many adaptative context-aware middleware exist and mostly rely on so-called vertical architectures that offer a functional decomposition for context-awareness. This architecture ...
Nicolas Ferry, Stephane Lavirotte, Jean-Yves Tigli...
160
Voted
JPDC
2000
141views more  JPDC 2000»
15 years 4 months ago
A System for Evaluating Performance and Cost of SIMD Array Designs
: SIMD arrays are likely to become increasingly important as coprocessors in domain specific systems as architects continue to leverage RAM technology in their design. The problem ...
Martin C. Herbordt, Jade Cravy, Renoy Sam, Owais K...
154
Voted
SDL
2003
147views Hardware» more  SDL 2003»
15 years 6 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
248
Voted
FPGA
2011
ACM
330views FPGA» more  FPGA 2011»
14 years 8 months ago
CoRAM: an in-fabric memory architecture for FPGA-based computing
FPGAs have been used in many applications to achieve orders-of-magnitude improvement in absolute performance and energy efficiency relative to conventional microprocessors. Despit...
Eric S. Chung, James C. Hoe, Ken Mai
ITC
2003
IEEE
158views Hardware» more  ITC 2003»
15 years 10 months ago
Extraction Error Diagnosis and Correction in High-Performance Designs
Test model generation is crucial in the test generation process of a high-performance design targeted for large volume production. A key process in test model generation requires ...
Yu-Shen Yang, Jiang Brandon Liu, Paul J. Thadikara...