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IPCCC
2007
IEEE
15 years 11 months ago
Memory Performance and Scalability of Intel's and AMD's Dual-Core Processors: A Case Study
As Chip Multiprocessor (CMP) has become the mainstream in processor architectures, Intel and AMD have introduced their dual-core processors to the PC market. In this paper, perfor...
Lu Peng, Jih-Kwon Peir, Tribuvan K. Prakash, Yen-K...
LCTRTS
2007
Springer
15 years 11 months ago
Addressing instruction fetch bottlenecks by using an instruction register file
The Instruction Register File (IRF) is an architectural extension for providing improved access to frequently occurring instructions. An optimizing compiler can exploit an IRF by ...
Stephen Roderick Hines, Gary S. Tyson, David B. Wh...
SENSYS
2006
ACM
15 years 11 months ago
Virtual high-resolution for sensor networks
The resolution at which a sensor network collects data is a crucial parameter of performance since it governs the range of applications that are feasible to be developed using tha...
Aman Kansal, William J. Kaiser, Gregory J. Pottie,...
INTERNET
2002
142views more  INTERNET 2002»
15 years 4 months ago
Mapping the Gnutella Network
Despite recent excitement generated by the peer-to-peer (P2P) paradigm and the surprisingly rapid deployment of some P2P applications, there are few quantitative evaluations of P2...
Matei Ripeanu, Adriana Iamnitchi, Ian T. Foster
190
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SIGCOMM
2012
ACM
13 years 7 months ago
Mirror mirror on the ceiling: flexible wireless links for data centers
Modern data centers are massive, and support a range of distributed applications across potentially hundreds of server racks. As their utilization and bandwidth needs continue to ...
Xia Zhou, Zengbin Zhang, Yibo Zhu, Yubo Li, Saipri...