4396 search results - page 706 / 880 » Measuring the Architecture Design Process |
145
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DAC
2008
ACM
16 years 6 months ago
2008
ACM
Clock skew minimization is always very important in the clock tree synthesis. Due to clock gating, the clock tree may include different types of logic gates, e.g., AND gates, OR g...
118
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MICRO
2009
IEEE
15 years 11 months ago
2009
IEEE
Many-core scaling now faces a power wall. The gap between the number of cores that fit on a die and the number that can operate simultaneously under the power budget is rapidly i...
148
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ISCA
2007
IEEE
15 years 11 months ago
2007
IEEE
Due to wire delay scalability and bandwidth limitations inherent in shared buses and dedicated links, packet-switched on-chip interconnection networks are fast emerging as the per...
158
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IWCMC
2006
ACM
15 years 11 months ago
2006
ACM
Designing and planning of the switching, signaling and support network is a fairly complex process in cellular mobile network. In this paper, the problem of assigning cells to swi...
140
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IWCMC
2006
ACM
15 years 11 months ago
2006
ACM
Past research studying the operations of TCP over wireless/mobile ad hoc networks has shown that TCP cannot be adopted as-is for use in mobile ad hoc networks (MANET) to achieve r...