8600 search results - page 1353 / 1720 » Measuring with Timed Patterns |
132
click to vote
DAC
2001
ACM
16 years 5 months ago
2001
ACM
In this paper, we study the problem of performance-driven multi-level circuit clustering with application to hierarchical FPGA designs. We first show that the performance-driven m...
119
Voted
DAC
2002
ACM
16 years 5 months ago
2002
ACM
In this paper, we evaluate an adaptive loop parallelization strategy (i.e., a strategy that allows each loop nest to execute using different number of processors if doing so is be...
168
Voted
DAC
2003
ACM
16 years 5 months ago
2003
ACM
Chemical-mechanical planarization (CMP) and other manufacturing steps in very deep-submicron VLSI have varying effects on device and interconnect features, depending on the local ...
155
click to vote
DAC
2004
ACM
16 years 5 months ago
2004
ACM
An ever increasing number of dynamic interactive applications are implemented on portable consumer electronics. Designers depend largely on operating systems to map these applicat...
112
click to vote
DAC
2005
ACM
16 years 5 months ago
2005
ACM
Partitioned BDD-based algorithms have been proposed in the literature to solve the memory explosion problem in BDD-based verification. Such algorithms can be at times ineffective ...