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ISLPED
2005
ACM
101views Hardware» more  ISLPED 2005»
15 years 4 months ago
Energy-aware fetch mechanism: trace cache and BTB customization
1 A highly-efficient fetch unit is essential not only to obtain good performance but also to achieve energy efficiency. However, existing designs are inflexible and depending on pr...
Daniel Chaver, Miguel A. Rojas, Luis Piñuel...
JCP
2008
86views more  JCP 2008»
14 years 11 months ago
Wordlength Estimation of Digital Controller Synthesis for Inkjet Printer Mechanism
The effect of finite wordlength on coefficients in implementing discrete-time controllers has been a subject of many recent studies. Especially, this issue is more severe in the lo...
Hung-Ming Cheng
79
Voted
ICDCN
2009
Springer
15 years 5 months ago
A Mechanism to Structure Mission-Aware Interaction in Mobile Sensor Networks
One of the main appeals of mobile sensors is the variety of environments in which they can operate as an autonomous network. Different environments, however, present different ch...
Michel Charpentier, Radim Bartos, Swapnil Bhatia
ISPAN
2008
IEEE
15 years 5 months ago
A Taxonomy of Data Prefetching Mechanisms
Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardw...
Surendra Byna, Yong Chen, Xian-He Sun
FMCAD
2007
Springer
15 years 2 months ago
A Mechanized Refinement Framework for Analysis of Custom Memories
We present a framework for formal verification of embedded custom memories. Memory verification is complicated ifficulty in abstracting design parameters induced by the inherently ...
Sandip Ray, Jayanta Bhadra