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» Mechanism design for policy routing
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DATE
2009
IEEE
98views Hardware» more  DATE 2009»
15 years 6 months ago
Test architecture design and optimization for three-dimensional SoCs
Core-based system-on-chips (SoCs) fabricated on threedimensional (3D) technology are emerging for better integration capabilities. Effective test architecture design and optimizat...
Li Jiang, Lin Huang, Qiang Xu
TODAES
2008
158views more  TODAES 2008»
14 years 11 months ago
Designing secure systems on reconfigurable hardware
The extremely high cost of custom ASIC fabrication makes FPGAs an attractive alternative for deployment of custom hardware. Embedded systems based on reconfigurable hardware integ...
Ted Huffmire, Brett Brotherton, Nick Callegari, Jo...
ANCS
2011
ACM
13 years 12 months ago
A Scalability Study of Enterprise Network Architectures
The largest enterprise networks already contain hundreds of thousands of hosts. Enterprise networks are composed of Ethernet subnets interconnected by IP routers. These routers re...
Brent Stephens, Alan L. Cox, Scott Rixner, T. S. E...
CCS
2004
ACM
15 years 5 months ago
IP covert timing channels: design and detection
A network covert channel is a mechanism that can be used to leak information across a network in violation of a security policy and in a manner that can be difficult to detect. In...
Serdar Cabuk, Carla E. Brodley, Clay Shields
UIST
1997
ACM
15 years 4 months ago
Designing and Implementing Asynchronous Collaborative Applications with Bayou
Asynchronous collaboration is characterized by the degree of independence collaborators have from one another. In particular, collaborators working asynchronously typically have l...
W. Keith Edwards, Elizabeth D. Mynatt, Karin Peter...