753 search results - page 111 / 151 » Mechanisms for Mapping High-Level Parallel Performance Data |
120
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ICS
2003
Tsinghua U.
15 years 6 months ago
2003
Tsinghua U.
Communication latencies within critical sections constitute a major bottleneck in some classes of emerging parallel workloads. In this paper, we argue for the use of Inferentially...
116
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SIGARCH
2008
15 years 1 months ago
2008
Conventional programming models were designed to be used by expert programmers for programming for largescale multiprocessors, distributed computational clusters, or specialized p...
100
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ICS
2001
Tsinghua U.
15 years 5 months ago
2001
Tsinghua U.
We describe the Slice Processor micro-architecture that implements a generalized operation-based prefetching mechanism. Operation-based prefetchers predict the series of operation...
155
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HPCA
2000
IEEE
15 years 5 months ago
2000
IEEE
Abstract—Sharing patterns in shared-memory multiprocessors are the key to performance: uniprocessor latencytolerating techniques such as out-of-order execution and non-blocking c...
161
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ICPADS
2002
IEEE
15 years 6 months ago
2002
IEEE
Abstract— Content replication and distribution is an effective technology to reduce the response time for web accesses and has been proven quite popular among large Internet cont...