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» Mechanisms for Mapping High-Level Parallel Performance Data
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ASPLOS
2010
ACM
15 years 8 months ago
Virtualized and flexible ECC for main memory
We present a general scheme for virtualizing main memory errorcorrection mechanisms, which map redundant information needed to correct errors into the memory namespace itself. We ...
Doe Hyun Yoon, Mattan Erez
IEEEPACT
2006
IEEE
15 years 7 months ago
Overlapping dependent loads with addressless preload
Modern out-of-order processors with non-blocking caches exploit Memory-Level Parallelism (MLP) by overlapping cache misses in a wide instruction window. The exploitation of MLP, h...
Zhen Yang, Xudong Shi, Feiqi Su, Jih-Kwon Peir
IPPS
2003
IEEE
15 years 6 months ago
Extending OpenMP to Support Slipstream Execution Mode
OpenMP has emerged as a widely accepted standard for writing shared memory programs. Hardware-specific extensions such as data placement are usually needed to improve the scalabi...
Khaled Z. Ibrahim, Gregory T. Byrd
SPAA
2006
ACM
15 years 7 months ago
Modeling instruction placement on a spatial architecture
In response to current technology scaling trends, architects are developing a new style of processor, known as spatial computers. A spatial computer is composed of hundreds or eve...
Martha Mercaldi, Steven Swanson, Andrew Petersen, ...
ICPP
2009
IEEE
15 years 8 months ago
Exploring the Cost-Availability Tradeoff in P2P Storage Systems
—P2P storage systems use replication to provide a certain level of availability. While the system must generate new replicas to replace replicas lost to permanent failures, it ca...
Zhi Yang, Yafei Dai, Zhen Xiao