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» Mechanisms for Mapping High-Level Parallel Performance Data
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ICS
1993
Tsinghua U.
15 years 3 months ago
Graph Contraction for Physical Optimization Methods: A Quality-Cost Tradeoff for Mapping Data on Parallel Computers
Mapping data to parallel computers aims at minimizing the execution time of the associated application. However, it can take an unacceptable amount of time in comparison with the ...
Nashat Mansour, Ravi Ponnusamy, Alok N. Choudhary,...
IPPS
2006
IEEE
15 years 5 months ago
FPGA implementation of a license plate recognition SoC using automatically generated streaming accelerators
Modern FPGA platforms provide the hardware and software infrastructure for building a bus-based System on Chip (SoC) that meet the applications requirements. The designer can cust...
Nikolaos Bellas, Sek M. Chai, Malcolm Dwyer, Dan L...
132
Voted
ECBS
1996
IEEE
155views Hardware» more  ECBS 1996»
15 years 3 months ago
Model-Integrated Program Synthesis Environment
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
Janos Sztipanovits, Gabor Karsai, Hubertus Franke
145
Voted
HPDC
2012
IEEE
13 years 2 months ago
Dynamic adaptive virtual core mapping to improve power, energy, and performance in multi-socket multicores
Consider a multithreaded parallel application running inside a multicore virtual machine context that is itself hosted on a multi-socket multicore physical machine. How should the...
Chang Bae, Lei Xia, Peter A. Dinda, John R. Lange
110
Voted
IPPS
2005
IEEE
15 years 5 months ago
A Case Study on Pattern-Based Systems for High Performance Computational Biology
Computational biology research is now faced with the burgeoning number of genome data. The rigorous postprocessing of this data requires an increased role for high performance com...
Weiguo Liu, Bertil Schmidt