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» Mechanisms for Mapping High-Level Parallel Performance Data
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HPCA
2004
IEEE
16 years 1 months ago
Out-of-Order Commit Processors
Modern out-of-order processors tolerate long latency memory operations by supporting a large number of inflight instructions. This is particularly useful in numerical applications...
Adrián Cristal, Daniel Ortega, Josep Llosa,...
IEEEPACT
2005
IEEE
15 years 6 months ago
Future Execution: A Hardware Prefetching Technique for Chip Multiprocessors
This paper proposes a new hardware technique for using one core of a CMP to prefetch data for a thread running on another core. Our approach simply executes a copy of all non-cont...
Ilya Ganusov, Martin Burtscher
MSS
2005
IEEE
106views Hardware» more  MSS 2005»
15 years 6 months ago
An Architecture for Lifecycle Management in Very Large File Systems
We present a policy-based architecture STEPS for lifecycle management (LCM) in a mass scale distributed file system. The STEPS architecture is designed in the context of IBM’s ...
Akshat Verma, David Pease, Upendra Sharma, Marc Ka...
PVM
2005
Springer
15 years 6 months ago
Collective Error Detection for MPI Collective Operations
Abstract. An MPI profiling library is a standard mechanism for intercepting MPI calls by applications. Profiling libraries are so named because they are commonly used to gather p...
Christopher Falzone, Anthony Chan, Ewing L. Lusk, ...
VIS
2004
IEEE
164views Visualization» more  VIS 2004»
16 years 2 months ago
Real-Time Motion Estimation and Visualization on Graphics Cards
We present a tool for real-time visualization of motion features in 2D image sequences. The motion is estimated through an eigenvector analysis of the spatiotemporal structure ten...
Christoph S. Garbe, Robert Strzodka