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» Mechanisms for Mapping High-Level Parallel Performance Data
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ICDE
2010
IEEE
248views Database» more  ICDE 2010»
16 years 1 months ago
FPGA Acceleration for the Frequent Item Problem
Abstract-- Field-programmable gate arrays (FPGAs) can provide performance advantages with a lower resource consumption (e.g., energy) than conventional CPUs. In this paper, we show...
Gustavo Alonso, Jens Teubner, René Mül...
IFIP
2004
Springer
15 years 6 months ago
A Framework for End-to-End QoS Context Transfer in Mobile IPv6
Providing Quality-of-Service (QoS) guarantees and mobility support for Internet devices has become a hot research topic in the Next Generation Internet research, since mobile compu...
Chuda Liu, Depei Qian, Yi Liu, Kaiping Xiao
ICDCSW
2003
IEEE
15 years 6 months ago
CATP: A Context-Aware Transportation Protocol for HTTP
— The rendering mechanism used in Web browsers have a significant impact on the user behavior and delay tolerance of retrieval. The head-of-line blocking phenomena prevents the ...
Huamin Chen, Prasant Mohapatra
MSS
2005
IEEE
182views Hardware» more  MSS 2005»
15 years 6 months ago
Evaluation of Advanced TCP Stacks in the iSCSI Environment using Simulation Model
Enterprise storage demands have overwhelmed traditional storage mechanisms and have led to the development of Storage Area Networks (SANs). This has resulted in the design of SCSI...
Girish Motwani, K. Gopinath
IEEEPACT
2006
IEEE
15 years 7 months ago
Architectural support for operating system-driven CMP cache management
The role of the operating system (OS) in managing shared resources such as CPU time, memory, peripherals, and even energy is well motivated and understood [23]. Unfortunately, one...
Nauman Rafique, Won-Taek Lim, Mithuna Thottethodi