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» Mechanisms for Mapping High-Level Parallel Performance Data
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99
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EUROPAR
2010
Springer
14 years 10 months ago
A Language-Based Tuning Mechanism for Task and Pipeline Parallelism
Abstract. Current multicore computers differ in many hardware aspects. Tuning parallel applications is indispensable to achieve best performance on a particular hardware platform....
Frank Otto, Christoph A. Schaefer, Matthias Dempe,...
94
Voted
CLUSTER
2003
IEEE
15 years 5 months ago
A Performance Monitor Based on Virtual Global Time for Clusters of PCs
Debugging the performance of parallel and distributed systems remains a difficult task despite the widespread use of middleware packages for automatic distribution, communication...
Michela Taufer, Thomas Stricker
103
Voted
CJ
2006
84views more  CJ 2006»
14 years 11 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
CCGRID
2010
IEEE
15 years 23 days ago
High Performance Dimension Reduction and Visualization for Large High-Dimensional Data Analysis
Abstract--Large high dimension datasets are of growing importance in many fields and it is important to be able to visualize them for understanding the results of data mining appro...
Jong Youl Choi, Seung-Hee Bae, Xiaohong Qiu, Geoff...
PPOPP
2009
ACM
16 years 6 days ago
Mapping parallelism to multi-cores: a machine learning based approach
The efficient mapping of program parallelism to multi-core processors is highly dependent on the underlying architecture. This paper proposes a portable and automatic compiler-bas...
Zheng Wang, Michael F. P. O'Boyle