753 search results - page 16 / 151 » Mechanisms for Mapping High-Level Parallel Performance Data |
VLDB
2005
ACM
15 years 5 months ago
2005
ACM
With the advent of chip multiprocessors, exploiting intra-transaction parallelism is an attractive way of improving transaction performance. However, exploiting intra-transaction ...
ICASSP
2008
IEEE
15 years 6 months ago
2008
IEEE
Previous studies have shown that wireless DSP algorithms exhibit high levels of data level parallelism (DLP). Commercial and research work in the field of software defined radio...
129
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IJHPCA
2008
14 years 11 months ago
2008
We present a de novo hierarchical simulation framework for first-principles based predictive simulations of materials and their validation on high-end parallel supercomputers and ...
CORR
2010
Springer
14 years 9 months ago
2010
Springer
Corporate mail services are designed to perform better than public mail services. Fast mail delivery, large size file transfer as an attachments, high level spam and virus protect...
119
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ISHPC
2003
Springer
15 years 4 months ago
2003
Springer
Simultaneous multithreaded processors use shared on-chip caches, which yield better cost-performance ratios. Sharing a cache between simultaneously executing threads causes excessi...