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» Mechanisms for Mapping High-Level Parallel Performance Data
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ICPP
2008
IEEE
15 years 7 months ago
Taming Single-Thread Program Performance on Many Distributed On-Chip L2 Caches
This paper presents a two-part study on managing distributed NUCA (Non-Uniform Cache Architecture) L2 caches in a future manycore processor to obtain high singlethread program per...
Lei Jin, Sangyeun Cho
HPDC
1997
IEEE
15 years 4 months ago
A Directory Service for Configuring High-Performance Distributed Computations
High-performance execution in distributed computing environments often requires careful selection and configuration not only of computers, networks, and other resources but also o...
Steven Fitzgerald, Ian T. Foster, Carl Kesselman, ...
HPCA
2008
IEEE
16 years 1 months ago
Runahead Threads to improve SMT performance
In this paper, we propose Runahead Threads (RaT) as a valuable solution for both reducing resource contention and exploiting memory-level parallelism in Simultaneous Multithreaded...
Tanausú Ramírez, Alex Pajuelo, Olive...
EUROPAR
2011
Springer
14 years 1 months ago
A Generic Parallel Collection Framework
Most applications manipulate structured data. Modern languages and platforms provide collection frameworks with basic data structures like lists, hashtables and trees. These data ...
Aleksandar Prokopec, Phil Bagwell, Tiark Rompf, Ma...
IPPS
2006
IEEE
15 years 7 months ago
Real-time task mapping and scheduling for collaborative in-network processing in DVS-enabled wireless sensor networks
With the increasing importance of energy consumption considerations and new requirements of emerging applications, in-network processing of information gains recognition as a viab...
Yuan Tian, J. Boangoat, Eylem Ekici, Füsun &O...