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» Mechanisms for Mapping High-Level Parallel Performance Data
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CASES
2001
ACM
15 years 5 months ago
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture
The rapid growth of silicon densities has made it feasible to deploy reconfigurable hardware as a highly parallel computing platform. However, in most cases, the application needs...
Girish Venkataramani, Walid A. Najjar, Fadi J. Kur...
ERSA
2004
134views Hardware» more  ERSA 2004»
15 years 2 months ago
A High Performance Application Representation for Reconfigurable Systems
Modern reconfigurable computing systems feature powerful hybrid architectures with multiple microprocessor cores, large reconfigurable logic arrays and distributed memory hierarch...
Wenrui Gong, Gang Wang, Ryan Kastner
TVLSI
2010
14 years 8 months ago
Exploration of Heterogeneous FPGAs for Mapping Linear Projection Designs
In many applications, a reduction of the amount of the original data or a representation of the original data by a small set of variables is often required. Among many techniques, ...
Christos-Savvas Bouganis, Iosifina Pournara, Peter...
IOR
2010
161views more  IOR 2010»
14 years 11 months ago
Mechanism Design for Decentralized Online Machine Scheduling
We study the online version of the classical parallel machine scheduling problem to minimize the total weighted completion time from the perspective of algorithmic mechanism desig...
Birgit Heydenreich, Rudolf Müller, Marc Uetz
AMT
2009
Springer
151views Multimedia» more  AMT 2009»
15 years 8 months ago
The Quest for Parallel Reasoning on the Semantic Web
Traditional reasoning tools for the Semantic Web cannot cope with Web scale data. One major direction to improve performance is parallelization. This article surveys existing studi...
Peiqiang Li, Yi Zeng, Spyros Kotoulas, Jacopo Urba...