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» Mechanisms for Mapping High-Level Parallel Performance Data
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IPPS
2006
IEEE
15 years 7 months ago
Performance evaluation of wormhole routed network processor-memory interconnects
Network line cards are experiencing ever increasing line rates, random data bursts, and limited space. Hence, they are more vulnerable than other processormemory environments, to ...
Taskin Koçak, Jacob Engel
HPCN
1999
Springer
15 years 5 months ago
XSIL: Extensible Scientific Interchange Language
We motivate and define the XSIL language as a flexible, hierarchical, extensible transport language for scientific data objects. The entire object may be represented in the file, o...
Kent Blackburn, Albert Lazzarini, Thomas A. Prince...
PODC
2010
ACM
15 years 5 months ago
Brief announcement: tree decomposition for faster concurrent data structures
We show how to partition data structures representable by directed acyclic graphs, i.e. rooted trees, to allow for efficient complex operations, which lie beyond inserts, deletes ...
Johannes Schneider, Roger Wattenhofer
DAC
2008
ACM
15 years 3 months ago
Application mapping for chip multiprocessors
The problem attacked in this paper is one of automatically mapping an application onto a Network-on-Chip (NoC) based chip multiprocessor (CMP) architecture in a locality-aware fas...
Guangyu Chen, Feihui Li, Seung Woo Son, Mahmut T. ...
FORTE
2008
15 years 2 months ago
An SMT Approach to Bounded Reachability Analysis of Model Programs
Model programs represent transition systems that are used fy expected behavior of systems at a high level of abstraction. The main application area is application-level network pro...
Margus Veanes, Nikolaj Bjørner, Alexander R...