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» Mechanisms for Mapping High-Level Parallel Performance Data
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ISSS
2002
IEEE
139views Hardware» more  ISSS 2002»
15 years 8 months ago
Multiprocessor Mapping of Process Networks: A JPEG Decoding Case Study
We present a system-level design and programming method for embedded multiprocessor systems. The aim of the method is to improve the design time and design quality by providing a ...
Erwin A. de Kock
242
Voted
SIGMOD
2011
ACM
442views Database» more  SIGMOD 2011»
14 years 6 months ago
ArrayStore: a storage manager for complex parallel array processing
We present the design, implementation, and evaluation of ArrayStore, a new storage manager for complex, parallel array processing. ArrayStore builds on prior work in the area of m...
Emad Soroush, Magdalena Balazinska, Daniel L. Wang
HPDC
2002
IEEE
15 years 8 months ago
A Secure Distributed Search System
This paper presents the design, implementationand evaluation of Mingle, a secure distributed search system. Each participatinghost runs a Mingle server, which maintains an inverte...
Yinglian Xie, David R. O'Hallaron, Michael K. Reit...
HPDC
2010
IEEE
15 years 4 months ago
Improving the Hadoop map/reduce framework to support concurrent appends through the BlobSeer BLOB management system
Hadoop is a reference software framework supporting the Map/Reduce programming model. It relies on the Hadoop Distributed File System (HDFS) as its primary storage system. Althoug...
Diana Moise, Gabriel Antoniu, Luc Bougé
99
Voted
EUROPAR
2004
Springer
15 years 8 months ago
SCISM vs IA-64 Tagging: Differences/Code Density Effects
In this paper we first present two tagging mechanisms; the SCISM and IA-64; thereafter we describe the mapping of IA-64 ISA to a SCISM configuration without changing or reassigni...
Georgi Gaydadjiev, Stamatis Vassiliadis