753 search results - page 65 / 151 » Mechanisms for Mapping High-Level Parallel Performance Data |
115
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IPPS
1997
IEEE
15 years 5 months ago
1997
IEEE
In this paper we present a generalized forall statement for parallel languages. The forall statement occurs in many (data) parallel languages and specifies which computations can...
112
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COOPIS
2004
IEEE
15 years 5 months ago
2004
IEEE
Abstract. This paper introduces ThreadMill - a distributed and parallel component architecture for applications that process large volumes of streamed (time-sequenced) data, such a...
116
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HPCA
1995
IEEE
15 years 4 months ago
1995
IEEE
Shared memory is an appealing abstraction for parallel programming. It must be implemented with caches in order toperform well, however, and caches require a coherence mechanism t...
115
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IPPS
1997
IEEE
15 years 5 months ago
1997
IEEE
Several optimizations to the Time Warp synchronization protocol for parallel discrete event simulation have been proposed and studied. Many of these optimizations have included so...
125
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CF
2009
ACM
15 years 7 months ago
2009
ACM
Recently, multi-core architectures with alternative memory subsystem designs have emerged. Instead of using hardwaremanaged cache hierarchies, they employ software-managed embedde...