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» Mechanisms for Mapping High-Level Parallel Performance Data
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ASPLOS
2004
ACM
15 years 6 months ago
HIDE: an infrastructure for efficiently protecting information leakage on the address bus
+ XOM-based secure processor has recently been introduced as a mechanism to provide copy and tamper resistant execution. XOM provides support for encryption/decryption and integrit...
Xiaotong Zhuang, Tao Zhang, Santosh Pande
CORR
2010
Springer
128views Education» more  CORR 2010»
15 years 1 months ago
A Performance Study of GA and LSH in Multiprocessor Job Scheduling
Multiprocessor task scheduling is an important and computationally difficult problem. This paper proposes a comparison study of genetic algorithm and list scheduling algorithm. Bo...
S. R. Vijayalakshmi, G. Padmavathi
WCNC
2008
IEEE
15 years 7 months ago
Performance Improvement for Multichannel HARQ Protocol in Next Generation WiMAX System
Hybrid automatic repeat-request (HARQ) is critical to an IEEE 802.16e OFDMA network, as it can significantly improve the reliability of wireless link. However, as revealed by our...
Zhifeng Tao, Anfei Li, Jinyun Zhang, Toshiyuki Kuz...
ISPA
2004
Springer
15 years 6 months ago
Performance-Aware Load Balancing for Multiclusters
In a multicluster architecture, where jobs can be submitted through each constituent cluster, the job arrival rates in individual clusters may be uneven and the load therefore need...
Ligang He, Stephen A. Jarvis, David A. Bacigalupo,...
LCPC
2005
Springer
15 years 6 months ago
Optimizing Packet Accesses for a Domain Specific Language on Network Processors
Programming network processors remains a challenging task since their birth until recently when high-level programming environments for them are emerging. By employing domain speci...
Tao Liu, Xiao-Feng Li, Lixia Liu, Chengyong Wu, Ro...